As is well known, electronic non-volatile memory circuits integrated in a semiconductor require that a circuit device be provided to sense, i.e., "read" the data from the memory cells. This device that converts the analog data to digital data is called a "sense amplifier".
Sense amplifiers of the static type are known. However, superior performance is provided by sense amplifiers of the dynamic type, this term indicating the presence, inside the amplifier, of a latch memory element to hold the data after it has been read.
A typical example of a dynamic sense amplifier for non-volatile memories of the Flash EPROM type is described in European Patent Application No. 0 713 222, herein incorporated by reference. The sense amplifier described in that application comprises a differential amplifier type of basic structure, wherein a cell to be read from the memory matrix is compared to a reference cell.
The currents of the matrix cell and a reference current generator are compared in the amplifier by means of a current-to-voltage conversion which compares the voltages present on two respective nodes in the matrix leg and the reference leg.
The read cycle of a conventional amplifier of the type described in the aforementioned European Application can be divided into three phases:
equilibration and precharging; PA1 integration; and PA1 sensing.
The precharge phase requires specially provided precharge circuitry 142, functional to charge the output nodes of the amplifier to a predetermined value of potential. The provision of this circuitry burdens the amplifier structure. In addition, an input equilibration circuit portion 144 is provided which becomes active at the start of the equilibration phase. Managing the operation of this circuit portion adds to the amplifier sensing time. Lastly, the current-to-voltage conversion phase is provided by an integration of the difference between the matrix and reference currents. This produces noise on the reference voltage used for impressing a bit-line voltage on the columns of the memory matrix.
The present invention is aimed at improving the dynamic sense amplifiers disclosed in the aforementioned European Patent Application.
A prior technical solution that already improves on the performance of the above-described amplifier is illustrated in a second European Patent Application by this Applicant, EP 96830164.8, herein incorporated by reference. This second Application discloses a dynamic sense amplifier which comprises a sense circuit including a latch circuit portion and an equilibration device, as well as a bias circuit portion for biasing the input terminals of the matrix and reference legs of the differential amplifier.
Although in several ways advantageous, not even this second technical solution is destitute of drawbacks, as specified herein below.
With respect to the sensing circuit, this prior solution does not allow a significant differential voltage to be generated rapidly before the latch circuit portion is enabled. Regarding the bias circuit portion, two distinct negative feedback circuits are used to impress a voltage on each of the two amplifier inputs. This involves the use of two distinct control signals, Pcleft and Pcright. In addition, in this prior solution, the sense amplifier is controlled by a circuit generating a signal whose slope is modulated as a function of the conductivity of the memory cell.
Because of these drawbacks, the resulting sense amplifier is not particularly fast.